Hardware addressing is traditionally used on I2C slave devices to allow more than one of the same type of device, e.g., opcode or slave address, coupled to the same I2C bus. This is accomplished by implementing hardware (HW) address pins that are independently biased to power or ground to create a unique slave address. For example, three (3) address pins allow up to eight (8) of the same type of devices to have unique slave addresses when coupled to the I2C bus.
However, the problem with the present technology HW addressing is that it uses multiple external connections (pins) on the integrated circuit packages of the devices when unique addressing is required for more than two devices. As integrated circuit package sizes are reduced so too are the number of external connections (pins) reduced, thus the ability to keep a HW addressing function for multiple devices is diminished or even eliminated.